搜索资源列表
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
verilog
- 组成原理的大作业，写一个计算器，用verilog语言写的-The composition of the major principles of operation, write a calculator, using the language written in Verilog
Verilog-book
- 学习Verilog语言必备资料，包括语法总结 编写Verilog HDL 源代码的标准及设计流程-Verilog language learning essential information, including syntax summary of Verilog HDL source code for the preparation of standards and design process
Verilog
- 很不错的Verilog 书籍 ，包括ieee标准和黄金指南-Very good Verilog books, including ieee standards and Gold Guide
lcd1602-verilog
- 基于QuartusII的LCD1602-Verilog 源代码，可以直接应用于FPGA开发板。-QuartusII based on the LCD1602-Verilog source code, can be directly applied to FPGA development board.
8051core-Verilog
- 8051内核的verilog描述，对学习EDA和处理器设计很有用的资料。-The disigning of the core 8051 using verilog language.
verilog
- verilog设计经验点滴 因为Verilog是一种硬件描述语言，所以在写Verilog语言时，首先要有所要写的module在硬件上如何实现的概念，而不是去想编译器如何去解释这个module-verilog technolog
Verilog
- Verilog大量例程 非常经典的资料，学习效果很好-Verilog routines very substantial information on the classic
Mars_EP1C6F_Interface_demo(Verilog)
- FPGA开发板配套Verilog代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。-FPGA development board supporting Verilog code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
Mars_EP1C6F_Fundermental_demo(Verilog)
- FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
arm7-verilog
- 用verilog写的仿ARM7的代码，在opencore上，现在被撤掉了-Written by verilog code like ARM7
verilog
- 中文版Verilog HDL简明教程，很简洁，结合实例，很容易理解，适合初学者。-Chinese version of Verilog HDL A simple tutorial, very simple, with an example, it is easy to understand for beginners.
verilog
- Verilog jpec coder encoder source code
verilog-Perl-3.120.tar
- Verilog Parser in Perl
Verilog-HDL-code
- verilog 经典例子的源码 非常适用于初学verilog的朋友们-classic example of verilog source code
Keyboard-and-mouse-Verilog
- Keyboard and mouse-Verilog
verilog
- 是数字信号处理的FPGA实现中所有程序（书中为VHDL)的verilog代码，很好，很有用-Digital signal processing in the FPGA to achieve all the procedures (the book for VHDL) of the verilog code, very good, very useful
verilog
- 里面有一百多个verilog实例 深入浅出的讲述了vrilog硬件描述语言的开发过程 成语代码以word 形式 -There are more than 100 verilog examples described in simple terms vrilog hardware descr iption language code of the development process in order to word the form of idioms
lift_controler-verilog
- 电梯控制程序！！ verilog 描述的-Elevator control procedures! ! described in verilog
verilog
- 多功能数字时钟的verilog语言描述，基于quarters II平台-Multifunction digital clock verilog language descr iption of quarters II-based platforms