搜索资源列表
ACTEL-FPGA-1602(Verilog)
- 1602液晶显示程序，用verilog写的！-1602 LCD program, written using verilog!
Verilog
- 田耘《无线通信FPGA设计》书中例子的Verilog代码-Tian Yun, " Wireless Communications FPGA design" book example of Verilog code
Verilog
- 异步fifo的经典写法，使用verilog语言编写的。-Asynchronous fifo' s classic formulation, using verilog language.
FPGA-RAM-Verilog
- 用Verilog语言编写的FPGA，对波形数据用RAM存储-Using Verilog language FPGA, using the waveform data stored in RAM
verilog
- 用Verilog语言描述比较器,数据选择器-Verilog language used to describe comparators, data selector
Verilog-SRAM
- 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
QUAD-SPI-verilog
- 难得的SPI NOR Flash控制器Verilog源代码，支持四路串行通道！-Rare SPI NOR Flash controller Verilog source code, supports four serial channels!
Verilog
- FPGA经典例子，可以让大家更好的学习Verilog HDL-Classic example of FPGA, allowing you to better learn Verilog HDL
VERILOG-jpeg
- 用Verilog语言在FPGA上实现JPEG图片的解码，附带testbench-With the Verilog language in the FPGA to achieve JPEG image decoding, with testbench
verilog
- verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog descr iption of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! !
verilog
- 基于Verilog HDL的通信系统设计一书的电子教案，里面有很多例子，大家可以参考一下-Verilog HDL-based communication system design e-book lesson plans, there are many examples we can refer to
Verilog
- verilog digital clock
Verilog-vga
- 基于Verilog的VGA显示汉字、字符的例子以及vga资料-Verilog' s VGA display Chinese characters based on the character of the examples and information vga
1024FFT-verilog-hdl
- 基于spartan 3e 的IFFT算法verilog HDL程序-Based on the verilog 3e Spartan IFFT algorithm of HDL program
verilog
- verilog实现的数字频率计8位数码管输出显示同时矩形波分档输出-verilog implementation of digital frequency meter
Verilog编码与综合中的非阻塞性赋值CummingsSNUG2000S
- Verilog编码与综合中的非阻塞性赋值-Verilog code and synthesis must blocking evaluation
Verilog DHL教程
- Verilog DHL教程-Verilog DHL course
8051core-Verilog
- 8051的verilog内核，fpga里实现8051的话用得上-8051 Verilog cores, fpga achieve useful 8051 words
verilog
- Verilog 经典实例，完整源码与大家分享-Verilog classic example of a complete source to share with you
Verilog--shiyanbaogao
- 有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的. 练习三 利用条件语句实现计数分频时序电路 实验目的： 1. 掌握条件语句在简单时序模块设计中的使用； 2. 学习在Verilog模块中应用计数器； 3. 学习测试模块的编写、综合和不同层次的仿真。 练习四 阻塞赋值与非阻塞赋值的区别 实验目的： 1． 通过实验，掌握阻塞赋值与非阻塞赋值的概念和区别； 2． 了解阻塞赋值与非阻塞赋值的不同使用场合； 3． 学习测试模块的编写、综合和不同层