资源列表
imageConversion
- 实现各种图像文件的转换，包括bmp\\jpg\\png-achieve various image file conversion, including bmp \\ jpg \\ png etc.
ModifyFileType
- 主要的功能是批量处理把以知道的文件类型修改为其他的文件类型。-main function is to extend the batch processing of documents known to other types of amendments to the document type.
vhdl_dial
- 拨码开关实验 拨码开关8 位0 1 状态在8 位7 段数码管相应位上显示0 或1。-dial-switch dial-switching experiment 8 0 1 state in seven of the eight corresponding digital control-show or a 0.
RADAR-simulation-code
- 这是关于RADRA仿真的.有如下代码placeClutter.m, plotDistLines.m, plotFOV.m, radarSimulation.m, runRadarSim.m, targetsReturn.m, radarSimulation.fig, analyzBuffer.m, buildAntenaGain.m, createTargets.m, displayTargets.m, handleRadarControlls.m, MTIcalcTargetsV.m-RADR
jibencaozuo
- 实现对二叉树基本操作的演示程序，代码简单易懂-realization of the basic operation of the binary tree Demonstration Program, easy-to-read code
avsdecdll
- AVS 视频解码器 for Windows-AVS Video Decoder for Windows
vhdl_buzzer
- 蜂鸣器实验 向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调，该实验通过设计一个状 态机和分频器使蜂鸣器发出“多来咪发梭拉西多”的音调。-buzzer to buzzer this experiment certain frequency square wave can buzzer sounded a corresponding pitch. The experiment by designing a state machine and the buzzer sounded a d
88merge
- 这是一个实现（８，８）归并的算法，即将两个含有八个元素的有序序列通过比较器归并成一个有序序列．-This is a realization of (Chemistry) merging algorithm 2 containing about eight elements in an orderly sequence comparison for incorporation into an orderly sequence.
1_070116141639
- verilog编程ps2接口设计,基于fpga的设计-verilog ps2 Programming Interface design, the design based fpga
vhdl_led
- 7 段数码管实验（包括两个实验） ７段数码管测试实验１：以动态扫描方式在８位数码管“同时”显示０—7，-seven of the digital control experiments (including two experimental), the digital control of a Test : Dynamic scanning approach to the eight digital control "at the same time" show 0 -7
HoughObject
- 用MATLAB简单的边沿提取.基于the Hough Matrix-MATLAB simple extraction 2500. Based on the Hough Matrix
VHDLnf
- VHDL实现任意整数分频，--只要把n设置成你要分频的数值就可以了-VHDL arbitrary integer frequency, -- n as long as you want to set the frequency of the numerical breakdown on the