资源列表
a_block_with_several_functions_with_Verilog_HDL.ra
- Verilog是广泛应用的硬件描述语言，可以用在硬件设计流程的建模、综合和模拟等多个阶段。随着硬件设计规模的不断扩大，应用硬件描述语言进行描述的CPLD结构，成为设计专用集成电路和其他集成电路的主流。通过应用Verilog HDL对多功能电子钟的设计，达到对Verilog HDL的理解，同时对CPLD器件进行简要了解。 本文的研究内容包括: 对Altera公司Flex 10K系列的EPF10K 10简要介绍，Altera公司软件Max+plusⅡ简要介绍和应用Verilog HDL对多功能
VerilogHDL
- 完整的九层电梯控制器verilog源代码-Complete nine-story elevator controller Verilog source code
32ET_source
- 32时隙的VHDL源代码 在开发E1 2M线路的时候非常有用-32 slot of the VHDL source code in the development of E1 2M lines is very useful when
hbf
- 半带插值滤波器设计、综合、仿真和硬件测试-Half-band interpolation filter design, synthesis, simulation and hardware test
ddr2sdram_spartan3s700an.tar
- It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Sparta
v2c5_sopc_leds
- 在quartus II软件中，通过Verilog实现FPGA对于彩屏LED的控制-In quartus II software through Verilog for FPGA implementation of control LED color
halfband
- verilog写的39阶通带为20KHz的半带fir滤波器，经测试正确。-verilog halfband FIR
risc
- RISC（reduced instruction setcomputer，精简指令集计算机）是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言，能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL s
microblaze_pwm
- spartan3e microblaze 定时器使用的一个源代码-spartan3e microblaze timer using a source code
Xil3S1800ADSP_Rev1_serial_flash_config_v10.1.03.zi
- spartan3adsp spi flash-spartan3adsp spi flash loader
verilogcode
- 这是用于xilinx virtex-2 pro产品的误码仪方案verilog HDL代码-verilog code for bit-error rate tester
cam
- 这是使用 fpga实现CAM功能的介绍。用VHDL语言实现。-This is the use of the use of FPGA implementation introduce CAM function. Implementation using VHDL language.