资源列表
multi_booth
- verilog编写的booth算法的8x16乘法累加器-verilog prepared booth algorithm 8x16 multiplier-accumulator
A-C8V4
- 淘宝畅销FPGA开发板的A-C8V4 电路图及例子 9实验九：利用语言实现3-8译码器 10实验十：利用语言实现按键和数码管显示 11实验十一：利用语言实现乘法器数码管显示 …… 18实验十八：利用语言实现蜂鸣器唱歌 23实验二十三：利用语言实现LCD1602显示 24实验二十四：利用语言实现LCD12864显示汉字 25实验二十五：利用程序实现串口RS232与电脑通信 28实验二十八：利用程序实现VGA显示RGB彩条信号 31实验三十一：利用程序实
microwave
- VHDL语言实现微波炉的程序，能够实现倒计时，点阵显示剩余时间，火力大小等，到时间的蜂鸣器报警-VHDL language program Microwave
4NandFlash
- fpga读写nandflash,verliog代码。16位读写，经测试。用于fpga带nandflash模块-pga read nandflash, verliog code. 16 read, tested. Modules for fpga with nandflash
cordic verilog 求sin cos的源程序
- cordic. it's about how to calculate sin and cos with the FPGA!
pwm_prj
- verilog开发的pwm检测与驱动，主要用来解析航模遥控器的pwm输出，并转化为能够直接控制电机的信号-verilog pwm detection and driver development, mainly used to parse model aircraft remote control pwm output, and converted into electrical signals can be directly controlled
GuessGame
- VHDL猜数游戏，系统生成随机数，操作者输入猜测的数字，系统给出输入数字与生成数字的大小关系，并统计猜测次数。可以下板使用-VHDL guessing game, the system generates a random number to guess the number of operator input, digital input and generating system gives the magnitude relationship between the digital and
verilog-montgomery-RSA
- 基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件-Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file
4answer
- 四路抢答器,实现抢答功能，采用verilog编程，代码简单易懂-four way of answer machine
74LS160jishuqi
- 74ls160十进制可预置计数器VHDL语言代码-74ls160 decimal VHDL language code can be preset counter
AXI_Master_FSM
- AXI Master, is implement with FSM
FPGADM9000AVerilog
- FPGA控制DM9000A进行以太网数据收发的Verilog实现-FPGA control DM9000A Ethernet data transceiver Verilog realize