资源列表
taxi
- 使用verilog语言编写的出租车计价器，适用于Quartus II软件，使用Cyclone IV系列开发板测试可用。-Use verilog language taximeter for Quartus II software, using Cyclone IV series development board test available.
PCIE_quartus13.1_tutorial2
- altera pcie avalon MM PCIE硬核仿真教程，器件Cyclone V，不同于教程1-avalon MM pcie sim tutorial，device Cyclone V，
3_Embedded_Systems_Lab
- altera max10 官网demo工程，嵌入式系统开发-max10 demo，Lab3 Embedded Systems Lab
4_Gesture_Sensor_Lab
- altera max10 手势传感器demo，2个传感器，nios2 实现-altera max10 Lab4 Gesture Sensor Lab，carry out with nios2
5_ADC_Lab
- altear max10 adc demo，实验使用了2个adc，最大支持18路adc-altear max 10 demo with 2 adc， max support 18 channel adc
6_USB_to_SDHC_Lab
- altera max10 USB demo，使用了phy，把开发板配置成U盘模式-altera max10 USB demo，using PHY device，design a U pan
7_BLE_WIFI_Lab
- altera max10 wifi demo， 非常有参考意义-altera max10 wifi demo，it is very usefull wo designers
8_MIPI_to_HDMI_Terasic
- altera max10 mipi demo,有mipi ip core的使用，是第3放提供，需要lic，但是可以借鉴其使用方法，有HDMI接口，很适合树莓派学习参考-altera max10 mipi demo，using mipi ip core，but it need lic file. HDMI also be use in the design and it is useful for video development
pci_lpc_card_7612_0910
- 基于PCI总线和LPC接口的POST主板诊断卡代码，已经通过fpga测试可以使用，性能非常稳定。-Based on the PCI bus and LPC POST motherboard diagnostic card code to interface fpga has passed the test can be used, the performance is very stable.
test
- FPGA（EP3系列）任意整数分频VHDL程序，修改程序里的n即可达到要求-FPGA (EP3 Series) any integer frequency VHDL program, modify the program can meet the requirements of n
ADVHDL
- 用fpga控制ad采集，用vhdl编写，可控制采样率-With fpga control ad acquisition, with vhdl written to control the sampling rate
project_4
- RGB 与YCbCr 颜色空间可以相互转化，此代码为YCbCr转RGB的实验代码-Display a signal, the resolution information can be seen as 1280 x 720 @ 60P, the display shows the standard 8-color vertical color bar