资源列表
xilinx_11
- some impurement of Vhdl libary (floating point vs..)
vhdl2008c
- VHDL extension, it is very good for this aim
Verilog-tutorial
- verilog tutorial it is very good tutorial-verilog tutorial it is very good tutorial
verilog
- it is very good tutorial about verilog
Verilog_Tutorial
- it is very good tutorial, it is about vverilog
Lecture6-Bus-Architecture
- simple processor with wirting in vhdl
digital_clock
- 本实验设计一个能够显示时、分、秒的数字时钟，时间在七段数码管上显示，显示数字为十进制数。通过开发板上的按键调整数字时钟的时间，分别用四个按键来控制分、时的增减，对于分、时的调整只影响本位，不产生进位或借位。各按键及数码管的功能要求如表1 所示。需要特别说明，因为开发板数码管的显示位宽不够，因此，通过一个开关进行切换选择（如：开,显示时分；关,显示分秒）。-When this experiment to design a display hours, minutes, seconds, digit
UART
- 设计一个具有固定波特率的UART串口收发器，可以实现9600波特率的串口通信，能够与PC机串口进行通信，支持8比特数据位、1比特停止位、无校验、无硬件流控模式。-Designed with a fixed baud rate of UART serial port transceiver can achieve 9600 baud serial communication, able to communicate with the PC serial port, support for 8-bi
FOCT
- 光纤电流互感器的温度测量与温度补偿，里面有uart，IIC，荧光温度计与ds12b20 之间的通讯协议-Temperature measurement and temperature compensation of optical fiber current transformer.There are UART, IIC, between the fluorescence thermometer and ds12b20 communication protocol
iis_m_2
- iis主模块，实现并行数据转成串行数据和音频数据传输的功能。-iis main module, parallel data to serial data transfer and audio data transmission capabilities.
UART_LED
- 单字节uart收发程序，带led指示,verilog quartusII 12.0 -verilog quartusII 12.0 uart-led
CIC-interpolation-filter
- 多级插值CIC滤波器，3级、过采样率为2的8位CIC插值滤波器，系统工作时钟的频率是数据速率的2倍 -Multi-stage interpolation CIC filter 3, an oversampling ratio of eight CIC interpolating filter, the operation clock frequency of the system 2 is twice the data rate