资源列表
counter
- 适用于FPGA Xilinx开发板的Counter程序，计数从0到9999，在板上用4位7段数码管显示，可实现双向计数。-Applicable to FPGA Xilinx development board of the Counter procedures, counting from 0 to 9999, in the board with four 7 digital display, enabling two-way counts.
66
- ABEL语言使用入门，verilog 和VHDL之外的一种硬件描述语言-ABEL hardware descr iption language
bcd8421
- da0832的 控制 -da0832
EDA_L03_2007Fall
- VHDL 的开发-VHDL
FPGAshili
- 学习VHDL语言时买的教科书后面的光盘，有20个典型的VHDL编写的程序，是学习VHDL和FPGA的非常好的资料，很多程序在网上是找不到的。-VHDL language learning textbook buy back the CD-ROM, 20 a typical procedure for the preparation of the VHDL, VHDL and FPGA to learn the very good information, many procedures are
FPGA_board
- fpga board designed based on spartran 3e, with hardware descr iptions, ready for layout and fabrications
87361001Uart2
- VHDL语言编写的UART串口通讯,2400Hz的波特率时钟-VHDL language UART serial communication, 2400Hz clock of baud rate
Design-Recipes-for-FPGAs
- that the fpga design for digital circuit and new technology design
textphase
- 恒精度测频，高精度测相VHDL程序，简明易懂，自己好好学啊-Constant frequency measurement accuracy, high-precision measurement of VHDL procedures, easy to understand, their own school ah well
Libero8.5_UG
- Libero集成设计环境(IDE)8.5版本，这套完整的软件设计工具系列已进一步扩展，支持新近推出的nano版本IGLOO和ProASIC3现场可编程门阵列(FPGA)。-Libero Integrated Design Environment (IDE) 8.5 version, this complete series of software design tools have been further expanded to support the recently introduced
FPGA_verilog_code_sample
- FPGA实例代码及详细注释 ，word 格式，对初学者很有价值-FPGA code examples and detailed notes, word format, valuable for beginners
pljtest
- CYCLONE II 内嵌8051IP核实现等精度频率计-CYCLONE II embedded nuclear 8051IP achieve precision frequency meter, etc.