资源列表
test_iic
- modelsim 下对iic进行仿真 包含iic时序说明-modelsim simulation under iic
logic_app
- 中际赛微15期培训班 逻辑功能试验 2009-5-Competition in 15 micro-logic function tests training 2009-5
SOPC_app
- 中际赛微 第15期培训 sopc培训内容 2009-5-Competition in the first 15 micro-sopc training training 2009-5
2009452332118218
- VHDL 的开发详细讲解, 对深入学习VHDL有莫大的帮助.有兴趣的朋友可以学习.-The VHDL development detailed explanation, to studies VHDL to have the greatest help thoroughly. Has the interest friend to be possible to study.
fpga-design
- FPGA的设计指导，包括设计原则，和设计注意事项。希望有助于大家！-FPGA design guidance, including design principles, and design considerations. Hope that helps everyone!
I2C
- FPGA数字电子系统设计与开发实例导航--I2C-FPGA digital electronic systems design and development of navigation example- I2C
UART
- FPGA数字电子系统设计与开发实例导航--UART-FPGA digital electronic systems design and development of navigation example- UART
USB
- FPGA数字电子系统设计与开发实例导航--USB-FPGA digital electronic systems design and development of navigation example- USB
verilog
- 经典verilog实例，将近130多个。包含大部分设计基础实例，有益于初学者学习。-Classic example of verilog, nearly more than 130. Contains examples of most of the design basis, the benefit of beginners learning.
verilog
- 经典verilog实例，将近130多个。包含大部分设计基础实例，有益于初学者学习。-Classic example of verilog, nearly more than 130. Contains examples of most of the design basis, the benefit of beginners learning.
risc8_tar
- 用Verilog HDL完整的写出了cpu -Using Verilog HDL to write a complete cpu
dds_test
- 使用图形编辑法（block模式）编写的全套DDS部分，应用于FPGA，开发环境为QuartusII。形象直观，用户可以直接生成代码另行应用-The use of graphic editing method (block mode) part of the preparation of the full range of DDS used in FPGA, the development environment QuartusII. Visual image, the user can be d