资源列表
DE2_audio
- 以DE2为平台，对输入的声音信号进行滤波，存储，播放等功能-To DE2 as a platform for the voice signal filtering input, storage, playback and other functions
cic18.tar
- TAIWAN晶片中心开发的180NM混合信号设计教学库-180nm mixed signal lib for education use from CIC
left_shift_register
- 用ＥＤＡ实现的一个带有同步并行预置功能的８位左移移位寄存器-With the EDA to achieve a preset function in parallel with synchronous 8-bit left shift register
counter60
- Verilog语言编写的模60计数器和testbench-Verilog language model 60 counters and testbench
c21_pn_code_generator
- 精通verilog HDL语言编程源码之7——伪随机序列应用设计-Proficient in programming language source verilog HDL of 7- the application of pseudo-random sequence design
m73a_nand_model
- Micron公司m73a系列nand flash仿真模型及测试文件-micron m73a series nand flash simulation model and testbench
min_max_finder_part1
- 最大最小值寻找程序，可以实现自动查找最大值与最小值-min_max_finder
crc
- 自己写的循环冗余校验，进行了仿真，整个工程都在！-Wrote it myself, cyclic redundancy check carried out a simulation, the whole project are in!
freerisc8_11
- 一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
Cordic_SinCos_Verilog
- 用Verilog语言写的Cordic来计算，正、余弦函数，包括仿真激励和仿真截图。-use Cordic to compute sine and cosine function
comp4
- comp4comp4.comp4comp4
uart
- verilog编写的uart发送和接收的源代码。简单易懂。-verilog uart prepared to send and receive the source code. Straightforward.