资源列表
AD9826
- 用VHDL语言编的视频AD传感器AD9826的驱动程序-the driver of AD9826
LDPC_Behavioral_VHDL
- 用VHDL语言编写的LDPC码硬件实现语言，相对于verilog的，比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple
canbus
- CAN总线的FPGA实现，用Verilog编写，代码完整，而且有很完善的测试代码，用ISE直接打开，学习FPGA进阶的好项目-CAN Bus FPGA, written with Verilog, code integrity, but also very good test code, using ISE directly open, a good project to learn advanced FPGA
sopc_led
- de2板上的led显示程序，最简单的nios测试程序，可以实现de2板上的两个小灯的闪烁，用quatus ii定置sopc系统！-de2 board led display program, the simplest nios test procedures can be achieved in two de2 board flashing lights, and quatus ii set sopc system!
VHDL_arrow
- 在8*8的双色点阵模块上显示电子路标，即一个箭头，并要求箭头可以沿一定方向流动。-The program will show a floating digital arrow along a direction in the square area with 8*8 double-color LEDs .
hilbert_transformer.tar
- hilbert 变换的vhdl源代码，来源于网上，本人也做过简单的8抽头的，但这个的算法还没搞懂，希望懂行的下载了研究一下，给个中文的简单的说明！-hilbert transform VHDL source code from the Internet, I have been a simple 8-tap, but even before they get to know this algorithm, I hope knowledgeable downloaded to look for a
sqrt32
- verilog源代码，用于开根号计算（32位）-sqrt32.v sqrt of 32-bit integer, Verilog source
FIFO_8_8
- FIFO先进先出队列，一种缓存、或一种管道、设备、接口（Verilog HDL程序,内附说明）-FIFO FIFO queue, a cache, or a pipeline, equipment, Interface (Verilog HDL program, containing a note)
fifo
- 先进先出存储电路fifo，实现队列存储结构-xianjin xianchu chunchu dianlu fifo
ApbGPIO
- PowerFull Apb GPIO Controller
PCI-IPcoreor1k[1]
- PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
ST7565-6800-LCD
- ST7565P 6800接口的驱动程序，有别于网上从多的8080或串口驱动程序。已经验证可以使用。-ST7565 6800 interface driver.have been verified and implemented successfully.