资源列表
uart.rar
- 基于vhdl的串口通信模块，即异步收发机，可实现单片机核fpga的收发串口通信，遵从rs232协议，已经调试过，很不错的资源,Vhdl-based serial communication module, that is, asynchronous transceiver can achieve single-chip transceiver nuclear fpga serial communication, rs232 to comply with the agreement, has be
as.rar
- 自己编写的的，基于verilog的加减法器！！！比较简单！！,Their written, based on instruments used in verilog addition and subtraction! ! ! Is relatively simple! !
CNT10-START.rar
- 十进制计数器的设计的源代码 verilog语言 ,conter10
FPGA-URAT.rar
- FPGA与PC串口自动收发程序,verilog源程序,FPGA and the PC serial port automatically sending and receiving process, verilog source code
lcdSOPC.rar
- NIOS实现12864的画线 画圆 点阵 字库 ,NIOS painting lines to achieve 12864 Circle Dot Font
uCLinux_on_NiosII.rar
- NIOS II平台下，uClinux的移植笔记，详细地记录了移植中需要注意的问题。,NIOS II platform, uClinux porting notes, a detailed record of the migration issues that need attention.
vhdlcpld.rar
- 用vhdl实现四人智能抢答器，强大成功，显示抢答号。超时没有人回答，有报警提示。,Using vhdl implementation of four smart Responder, strong success, showing to answer in number. Out that no one answered, there is alarm.
EasyFPGA030.part1.rar
- 周立功 EasyFPGA030 开发板光盘1，,EasyFPGA030 development board CD-ROM 1
EasyFPGA030.part2.rar
- 周立功 EasyFPGA030 开发板光盘2，,ZLG EasyFPGA030 development board CD-ROM 2,
altera_modelsim.rar
- modelsim6.0—altera 详细的教程，肯定能教会你，比网上那些好多了，分享给大家,good！
hh.rar
- 串行输入并行输出 用vhdl语言描述的 有源代码主打色,Serial input parallel output using vhdl language to describe the main color of the source code
rom.rar
- 基于Verilog语言编写的各种只读存储器rom和随机存储器ram,Verilog language based on a variety of read-only memory rom and random access memory ram