资源列表
EP2C5.rar
- Altera提供的CycloneII的orCAD封装库,Altera provided CycloneII the OrCAD library package
crackquartusii7.2sp3.rar
- 用于quartus7.2sp3的破解，里面有详细说明，操作方便,For the crack quartus7.2sp3, which has detailed instructions, easy to operate
HwLog10.rar
- 用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。,It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.
半整数分频器的实现（verilog）
- 半整数分频器的实现（verilog），本文以6.5分频为例！很实用的！,fen pin qi
alteralvds.rar
- 基于altera系列芯片lvds接口的fpga设计 verilog源码,Series altera-based chip interface lvds source fpga design verilog
eda.rar
- 使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟,The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
uart.rar
- 带自适应波特率发生器UART实现，经过FPGA验证的！,UART baud rate generator with adaptive realization, after FPGA validation!
paobiao.rar
- verilog实现的数字跑表 精确到10ms,verilog digital stopwatch to achieve accurate to 10ms
DDS.rar
- Quartus中实现的DDS 使用的是altera提供的IP core,DDS achieved Quartus using IP core provided by altera
jianbo.rar
- 运用CORDIC算法完成对矢量信号模值及相位信息的运算,The use of CORDIC algorithm for completion of the vector signal value and the phase mode of operation information
uart.rar
- Verilog编写的UART程序源代码。测试成功。支持字符串发送,UART prepared Verilog source code. Successful test. Support string sent
Avalon_PWM_IP_pwm.rar
- Avalon总线下的PWM的IP模块。基于VHDL语言。,Avalon Bus IP of the PWM module. Based on the VHDL language.