资源列表
03_beep.rar
- 通过verilog语言，驱动无源蜂鸣器，实现建议电子琴的功能,Through verilog language, passive buzzer driver, the proposed implementation of the Electronic organ function
TC241_VHDL.rar
- VHDL写的TC241 CCD控制器程序,TC241 CCD control program，written in VHDL
Micron_SDRAM_DDR2Simulation_mo
- DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme,DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
test3.rar
- A VHDL source code for testing the digits and the switches on a spartan 3 basys board,A VHDL source code for testing the digits and the switches on a spartan 3 basys board
FPQ.rar
- 分频器的vhdl描述，在源代码中完成对时钟信号CLK的2分频,4分频,8分频,16分频,Divider vhdl descr iption of the source code at the completion of the CLK clock signal frequency of 2 hours, 4 minutes frequency, frequency of 8 hours, 16 minutes frequency
altera.rar
- 在调试nios ii时，由于软件或者是环境的改变造成原先建好的工程不能正常使用，提供一点解释希望能有所帮助,when debugging Nios ii, or because of software changes in the environment are caused by the original construction of the project should not normally use, to provide a little hope to be helpful to
cf.rar
- 乘法器功能 直接实现两个数字信号的相乘～,Multiplier features two digital signal direct implementation of the multiplication ~
典型实例10.8 字符LCD接口的设计与实现
- 典型实例10.8 字符LCD接口的设计与实现 软件开发环境：ISE 7.1i 硬件开发环境：红色飓风II代－Xilinx版 1. 本实例控制开发板上面的LCD的显示； 2. 工程在\project文件夹里面 3. 源文件和管脚分配在\rtl文件夹里面 4. 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。,Typical examples of character LCD interface 10.8 The Des
I2C_Controller.rar
- 对视频编解码芯片ADV7181进行合理的配置，使其输出符合ITUR656标准的视频流,Of the ADV7181 video decoder chip for a reasonable configuration, so that the output in line with the standard video streaming ITUR656
ADCINT.rar
- adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的,ADC0809
DDR2 SDRAM 控制器的FPGA实现
- DDR2 SDRAM 控制器的FPGA实现,DDR2 SDRAM controller FPGA to achieve
booth.rar
- 一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码,VerilogHDL language based on the 16-bit multiplier of the booth algorithm and test code