资源列表
fpga加密设计方法
- FPGA加密的方法,对于那些需要加密自己的vhdl源代码的人来说,很有用-FPGA encryption methods for those who need to encrypt their VHDL source code in a way, very useful
file_verilog
- 该文件用在CPLD上的,和C语言很接近,5位的计数器一个。-the documents on the CPLD, and the C language is close to that of the five counters one.
ad cvtor
- 开发环境:maxplus2 a/d convortor-development environment : maxplus2 a / d convortor
DISPLAY-vhdl
- vhdl描述的显示代码 maxplus2开发环境-VHDL descr iption of the display code development environment maxplus2
ERFREE_COUNTER-vhdl
- maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
KEYBOARD_DEC-vhdl
- maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
SCAN-vhdl
- maxplus2为开发环境 vhdl编写的 扫描 程序-maxplus2 VHDL development environment for the preparation of a scanning program
expi
- Vhdl实现计算exp功能 在apex20k上经过验证-Vhdl achieve in terms exp function on proven apex20k
gal反汇编
- GAL16V8反汇编源程序JED2ABEL.C 把jec汇编成abel文件
直流电机控制器
- 直流电机控制器,属于精品vhdl源码,可在eda仿真工具上仿真实现-DC motor controller is excellent VHDL source code can be sown in simulation tools Simulation
mc8051_cyclone_nios
- 增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 development board
4dpsk
- 4dbpsk系统的设计实现源码,几个朋友用一个假期的时间协作完成,功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good
