资源列表
Project_7
- MC9S12单片机SCI模块中断检测，串口数据传输检测-Single-chip module interrupt detection MC9S12 SCI, serial data transmission test
hlbt
- 基于DSP TMS320F2812实现的希尔伯特变换，完整工程。-Hilbert transform based on DSP TMS320F2812 complete works.
PIC16F1933-CVD-Touch-Keyoard
- PIC16F1933 CVD example code w/ touch keys and LEDs Mplab Hitech Compiler
timer32
- 嵌入式开发中很常见的定时器应用，通用定时器，高级定时器，一般我们用的是通用定时器-Embedded development is very common Timer, general purpose timers, senior timers, generally we use the general-purpose timers
licunzhu520
- 完整的电子称源码 LCD12864+hx711+51-Complete electronic source said LCD12864+hx711+51
lift
- PIC16F1936上写的一款电动工具的程序，最早是个美国老外写的，后来转交给我维护，里面包括PIC单片机的定时器，IO口，EEPROM，PWM等的操作及设置，采用最新的MPLAB XIDE编写。绝对有参考价值。-this is a program of battery powered tool, you can find the setting for TIMER,PWM,EEPROM and IO , it was complied on MPLAB XIDE and it is very
pipelined_fft_256
- verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
ALIENTEK MiniSTM32 实验21 触摸屏实验
- 触摸屏实验 利用stm32开发板进行编程(Touch screen experiment, using STM32 development board for programming)
a2dp_sink
- A2DP sink for CSR 867X in ADK 4.0.
stm8l15x LCD FULL DISPLAY
- stm8l15x 液晶屏全显示，用到的引脚是：LCD_COM0~3, LCD_SEG0~7(stm8l15x LCD FULL DISPLAY)
pll_test
- PLL，即锁相环。是FPGA中的重要资源。由于一个复杂的FPGA系统往往需要多个不同频率，相位的时钟信号。所以，一个FPGA芯片中PLL的数量是衡量FPGA芯片能力的重要指标。FPGA的设计中，时钟系统的FPGA高速的设计极其重要，一个低抖动, 低延迟的系统时钟会增加FPGA设计的成功率。本例程调用Xilinx提供的PLL核来产生不同频率的时钟, 并把其中的一个时钟输出到FPGA外部IO上, 也就是开发板的SMA接口上。(PLL, pll. It's an important resource
HIDsensor-master
- This project contains open-source firmware for an example USB HID Sensor implementation. Functionally equivalent source code is provided for two inexpensive USB microcontrollers: