资源列表
CapacityRAMModel
- Capacity RAM Model的VHDL的例子。最佳的资源优化版。-Capacity Model RAM VHDL example. The best resource optimization version.
pic.rar
- 基于PIC单片机的遥控器接收源代码,汇编所写,PIC MCU-based remote control to receive the source code, compilation of written
clock
- verilog 电子钟！！！ 用于初学者学习-Electronic clock design Electronic clock design Electronic clock design
watch
- 基于DE-2的数字跑表设计，并带两种显示功能-DE-2-based digital stopwatch design, with two display
Matrix-keyboard
- atmega16矩阵键盘，4*4，经测试可以使用-atmega16 matrix keyboard, 4* 4, the test can be used
m2t2
- m2t2小系统板时钟程序，可键盘调节时间，可通过源代码改报警时间-Small m2t2 system board clock procedures, can adjust time, the keyboard can be through the source code change alarm time
dsq
- 基于单片机89S51的定时器的设计,用过验证和实际实践-timers in the design, validation and used actual practice
mt8880
- 子程序时经过很长时间的仔细调试完成的！绝对的能用
31
- IO 口模拟232通讯程序， 使用两种方式的C程序 占用定时器time0. -232 Communications I Simulation of IO, the use of the C procedure in two ways timer occupied time0.
inverter
- PIC16F73逆变程序,产生SPWM程序-PIC16F73 INVERTER
S-3530
- 实时时钟—S-3530—MSP430程序 S-3530 MSP430程序-Real-Time Clock-S-3530-MSP430 program S-3530 MSP430 program
Center-Manage
- 电力线载波 中心控制器 主要是控制电力线载波节点-Power line carrier central controller to control the main power line carrier nodes