资源列表
Poweron_initial
- 开机后的启动流程at89x51初始化及相关编程-boot after the start at89x51 initialization process and related programming
fet440_wdt02
- MSP-FET430P440 Demo - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK-MSP-FET430P440 Demo - 14d Toggle P5.1 Inte rval overflow ISR, 32kHz ACLK
932016biitalcode
- ＩＬＩ９３２０的初始化，非常有用处，不要小看他哦
0dao9
- 48*48的数字矩阵，用于嵌入式LCD显示。-48* 48 digital matrix for the embedded LCD display.
dongTest
- 用红外线传感器，通过单片机控制，实现小车的自动循迹，还包括电机的驱动程序-With infrared sensors, through MCU control, achieve the car' s automatic tracking, but also including the motor driver
VUM2x16_02
- Medidor VU estéreo con memoria de pico 1hex file
gt2440_leds
- GT2440 是一款追求工业级完美品质的开发系统。采用国内多项创新性设计，主板采用超高品质的PCB板材加上全工业布线，使之拥有业界领先的稳定性。本源码是LED驱动-GT2440 is a pursuit of perfect quality, the development of industrial systems. Domestic use of a number of innovative design, using high-quality PCB board with the whol
afficheur
- Allow you to make display on your Spartan-3 Xc3s2-Allow you to make display on your Spartan-3 Xc3s200
nco
- 数字接收机DDS中NCO设计，vhdl代码参考-NCO of DDS in a digital receiver design,vhdl code reference
4add
- verilog 实现两级流水线加法器 源代码 以及测试代码 adder16_2.v test_adder16_2.v-verilog Implement two pipeline adder source code and test code adder16_2.v test_adder16_2.v
mul1617
- 采用verilog RTL级语言，实现了有符号的16位乘17位的乘法器。特点是：采用流水的结构，可以在一个周期内处理完数据。通过QuartusII和Modulesim的功能仿真和时序仿真，并得到正确结果。-Realize the signs of 16 of the 17 patients take on time-multiplier. Features are: the structure of water, can be in a cycle processes the data. Thr