资源列表
FPGA-Introduction
- 简单介绍Verilog HDL语言和仿真工具，主要应用领域，了解Verilog 的发展历史 -Brief introduction to Verilog HDL language and simulation tools, the main application areas to understand the historical development of Verilog
basegate
- verilog的基本门电路描述 附带功能仿真波形-verilog descr iption of the basic gate circuit functional simulation waveforms with
DSP
- CCS的开发系统主要由以下组件构成： ① TMS320C54x集成代码产生工具； ② CCS集成开发环境； ③DSP/BIOS实时内核插件及其应用程序接口API； ④ 实时数据交换的RTDX插件以及相应的程序接口API； ⑤ 由TI公司以外的第三方提供的各种应用模块插件。 -df saha sd fh da fjh adfj had fjafjafj
LV_VolumeControl
- A Labview vi that can control Windows audio Volume in both playback an d recording direction
ARM0000
- 了解嵌入式系统的构建，帮助大家进行嵌入式系统方面的开发-Understanding of the construction of embedded systems to help people to the development of embedded systems
Lab14_Adjustable-digital-clock
- 通过LPC2132的Timer0模块实现简易时钟的显示功能并通过数码管显示,显示格式:"HH-MM-SS" -LPC2132 Timer0 module through the simple display of the clock and through the digital display, display format: " HH-MM-SS"
Lab23_AD
- 测量连接在P0.27,P0.28引脚上的AIN0,AIN1的模拟量输入端的两个电位器可调的直流电压,将模拟量转换成数字量送LED数码管显示-Measurement connected to the P0.27, P0.28 pin AIN0, AIN1 analog inputs of the two DC voltage adjustable potentiometer, the analog into a digital number to send LED digital display
Lab20_PWM
- 通过LPC213X的P0.21引脚上的PWM5输出频率为20KHZ,占空比为30 的PWM信号输出-By LPC213X the P0.21 pin PWM5 output frequency 20KHZ, 30 duty cycle PWM signal output
proteus_clock
- 利用protues和mega8做的数码管电子时钟-protues and mega8 tolls design a clock
dsp
- DSP 数字图象处理实验 学习灰度图象反色处理技术-dsp digital picture processing experiment
zhinengxiaoche.pdf
- 单片机智能小车操作使用手册，有小车的制作功能-danpianji zhinengxiaoche
ZLG7289B_FAQ
- 关于周立功7289b的资料，datasheet 有例子和库函数编辑！还不错！-Information on ZLG 7289b, datasheet library functions with examples and editing! Pretty good!