资源列表
PCI
- 高速PCI信号采集卡设计与实现，源码丰富，解释详尽-Design and Implementation of high-speed PCI data acquisition card, a rich source to explain detailed
25_sec_time
- //数码管数据输入，//数码管位选信号，每隔1ms变化一次 -//Digital control data input// digital pipe select signal every 1ms change once
coding-for-Simulation
- For filter --a novel area efficient architecture in verilog and testbench is developed
adaptive_lms_equalizer_latest.tar
- least mean square algorithm for error correction coding technique
ceshi
- 键盘扫描输入并伴随随语音信号，通过FPGA控制，含picoblaze汇编的源代码。-The keyboard scan inputs and is accompanied with the voice signal, controlled through the FPGA, including picoblaze compiled source code.
PS2_PCM_VGA
- ps2信号输入经解码通过vga显示输出，能显示0~9任意一个数字在屏幕。-ps2 signal input by the decoder through the vga display output, 0 to 9, any number can display on the screen.
uart_top
- 串口驱动程序，quartusII9.1开发。-Serial port driver, quartusII9.1 development.
FPGA-Prototyping-By-Verilog-Examples
- <FPGA Prototyping By Verilog Examples>是Verilog指导性的书籍，这个压缩文件包含了PDF格式的电子书和书中的源代码，对于您的学习会有很大帮助。-<FPGA Prototyping By Verilog Examples> Verilog guidance books, The compressed file contains a PDF format e-books and the book' s source code,
Lab08
- 嚴格來說是verilog才對 但我找不到這環境 此code是用硬體去實現簡單的queue功能 可以合成在gate level 下也沒問題的 此外還有加上省電功能 有興趣可以參考一下-verilog for queue
renconfig_pcie
- fpga可重构的pcie总线快速配置，动态可重构与静态逻辑的接口-fpga reconfigurable pcie bus rapid configuration, dynamically reconfigurable and static logic interface
Day1
- 有关硬件逻辑的培训教程，大家可以一块学习哦-traning
Day2
- 一些赢家逻辑电路和编程的培训资料 大家一块学习-training for the vhdl