资源列表
paobiao
- 该程序为数字跑表程序，具有复位，暂停，秒表计时等功能。-The program is a digital stopwatch program with reset and pause stopwatch timing functions.
mpc
- 该程序为设计实现了一个简单的微处理器，使用硬件语言编辑，设计方法简单。-The program is designed to achieve a simple microprocessor hardware language editing, simple design.
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- 大西瓜FPGA开发板陪赠资料\大西瓜FPGA开发板例程（基础+进阶）\开发板基础实验\开发板基础实验---数码管的动态显示。Verilog -Watermelon FPGA development board to accompany gifts Data \ the watermelon FPGA development board routines (foundation+ Advanced) \ basic experimental development board \ basic ex
time_clock
- 时钟数码管显示FPGA例子-Verilog语言-Clock digital display FPGA example-Verilog language
FPGA-Uart
- fpga串口通讯程序。用Verilog语言编写-fpga serial communication program. Verilog
hi
- Hi this very important code of router by using verilog -Hi this is very important code of router by using verilog
3110000854
- 基于quartus的EDA八路抢答器电子设计.完备的电路图，仿真已经通过-The complete schematic, simulation by electronic design based the quartus of EDA eight-way Responder.
A-VLSI-PROGRESSIVE-CODING-FOR-WAVELET-BASED-IMAGE
- a vlsi progressive coding technique
pong
- pong in vhdl code fo fpga
emif
- EMIF字符型设备驱动，实现了dm368与FPGA之间的通信，把FPGA当着dm368的一个ram往里面写数据和向外发数据。-The driver of EMIF .
chunge
- Xilinx FPGA verilog 数字钟-Xilinx FPGA verilog digital clock
ds
- 用VHDL实现的DS18B20温度传感器驱动，有效温度数据位为9位，每92ms刷新一次温度数据。-DS18B20 temperature sensor using VHDL drive, the data bits of the effective temperature of 9 per 92ms refresh time temperature data.