资源列表
reg_bank
- A register bank with the function of output=input when enable is true. Also having a reset function
alu
- An ALU with two inputs a and b and four basic ALU functions: output=a+1 or a+b+1 or b or a+b. Using a 2 bit input "sel" to select one function.
oc8051_tc2
- oc8051的timer2模块，原来的有错误，自己修改的-oc8051 timer2 module, the original error, make changes to
emg
- 游戏手柄控制fpga贪食蛇小游戏 挺有意思的一个小游戏。-fpga Snake game based on the vhdl and control by the gamepad. it is a fun game.
moveophone
- 移动式的游戏控制器基于vhdl. 简单结构 目前只能识别led-Due to the recent trend in creating devices that allow the playing of games using movement rather than a traditional joystick, controller, or keyboard, we felt that a project that followed this idea would be interestin
audio
- OPB_AC97核心，支持国家的LM4549A AC97编解码器。这个核心中的AC97控制器提供了一个基于寄存器的AC97协议的串行接口。-the OPB_AC97 core developed to support the National LM4549A AC97 Codec. The AC97 controller contained in this core provides a register-based interface to the serial AC97 protocol.
humanpong
- 我们的目标是建立一个人力乒乓球比赛的FPGA板（Xilinx公司的Virtex-II Pro的XC2VP30与的Digilent公司VDEC1的视频解码器）。-Our group objective is to build a Human Pong game on an FPGA board (Xilinx Virtex-II Pro XC2VP30 with the Digilent VDEC1 Video Decoder).
fixed_point_arithmetic_parameterized_latest.tar.g
- fixed point arithmetic parameterized
quadratic_func_latest.tar
- quadratic function for vhdl language
serial_div_uu_latest.tar
- serial divide with testbench
my_fir
- Verilog 写的FIR滤波器，modelsim仿真通过-Verilog write FIR filter, modelsim simulation through
projet
- Nous nous proposons de construire un système d’acquisition à partir du « SPARTAN 3A FPGA starter kit board » de XILINX et des périphériques de cette carte dans le cadre du TP « acquisition de données » . Le kit comprend un ADC deux vo