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  1. lut

    0下载:
  2. verilog查找表功能的实现,基本的查找表功能,可以作为编写查找表的参考-verilog lookup table functions to achieve the basic function lookup table can be used as reference for the preparation of a lookup table
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-17
    • 文件大小:4.1mb
    • 提供者:李九阳
  1. action_vip_uart

    0下载:
  2. FPGA串口使用程序,通过调试验证,直接调用即可,方便使用-FPGA UART
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:807.57kb
    • 提供者:tangping
  1. fifo

    0下载:
  2. CAN总线,DSP+FPGA+SJA1000架构,FPGA负责逻辑设计,此文件内有FPGA负责dsp和sja1000通信-CAN bus, DSP+ FPGA+ SJA1000 architecture, FPGA logic is responsible for the design, FPGA is responsible in this document have dsp and sja1000 Communications
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-14
    • 文件大小:4.43kb
    • 提供者:张浩阳
  1. control_logic

    0下载:
  2. PCI总线的状态机程序,用突发模式写的,单周期可以用,突发模式没驱动,很好的东西哦-PCI bus state machine programs written using burst mode, single-cycle can be used, no burst mode driver, a very good thing, oh
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-06
    • 文件大小:1.53kb
    • 提供者:张浩阳
  1. uart_send

    0下载:
  2. 串口发送程序,用无数设备验证过的,可靠,波特率2M,系统时钟40M-Serial transmission program, verified by numerous equipment, reliable baud 2M, the system clock 40M
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:864byte
    • 提供者:张浩阳
  1. 24bit-dadda-multiplier

    0下载:
  2. IT IS HIGHBRID MULTIPLIER WHERE WILL BE USEFUL TO GET HIGH SPEED MULTIPLICATION IN PROCESSORS
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-29
    • 文件大小:8.28kb
    • 提供者:ajay kumar
  1. reversible-squarer

    0下载:
  2. it is hybrid squarer circuit which will be designed using reversible gates which having les hardware complexity with compared to the conventional gates
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:2.44kb
    • 提供者:ajay kumar
  1. ddfs

    0下载:
  2. IT IS THE CIRCUIT WHICH EXACTLY WORK AS SINE WAVE GENERATOR, THIS CAN BE EFFICIENTLY USED IN THE COMMUNICATIONS SYSTEMS
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-29
    • 文件大小:87.21kb
    • 提供者:ajay kumar
  1. 4-2-compressor

    0下载:
  2. IT IS THE HYBRID COMPRESSOR WHICH WILL BE USEFUL LOW POWER SINCE THE GATE COUNT AND DELAY REQUIRED IS VERY LESS COMPARED TO THE NORMAL DESIGN
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-09
    • 文件大小:1.53mb
    • 提供者:ajay kumar
  1. vid_clkgen

    0下载:
  2. Xilinx xapp sink displayport vid clk geneator source
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:923byte
    • 提供者:asdfqqqwa
  1. submicron-technology

    0下载:
  2. IT IS THE TECHNOLOGY TO REDUCE THE SHORT CIRCUIT LEKAGE POWER IN CMOS TECHNOLOGY. BY THIS WE CAN AVOID THE SHORT CIRCUIT POWER
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-15
    • 文件大小:7.33kb
    • 提供者:ajay kumar
  1. image-rotation

    0下载:
  2. 基于FPGA的system generator的图像旋转处理,利用system generator的图像旋转处理程序。本程序是基于system generator下的matlab运行。-FPGA-based image processing system generator rotation, the use of image rotation system generator handler. This procedure is based on matlab run under the sy
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-29
    • 文件大小:154.99kb
    • 提供者:wyj
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