资源列表
lcd
- 基于Verilog HDL的编程程序实现，主要是一个液晶lcd的程序-These are program examples based on Verilog HDL
shuzipinluji
- 基于fpga的数字频率计的vhdl设计源码-Fpga-based digital frequency meter vhdl design source
i2c_master_bit_ctrl
- I2C控制总线主机，按照字节写设计的verilog代码，由于选项中没有verilog这项，因此选择VHDL-I2C control bus master, according to the byte write verilog code design, because the option is not verilog this, so choose VHDL
ad_spi
- AD2548 SPI读写时序 VHDL-AD2548 SPI
AD7938controllor-VHDL
- VHDL语言的有限状态机法控制8位/12位自动转换通道模数转换器AD7938-VHDL, FSM method to control 8-bit/12-bit ADC AD7938 auto-conversion channel
counter10
- 带LDN的的同步的预置数端子，并且带CLR的异步清零端-LDN synchronization with the preset number of terminals, and cleared with CLR Asynchronous client
LCDdriver
- LCD dispay driver in VHDL
pwm
- 通过该IP核输出三路pwm波，可用来控制一个舵机和两块L298N驱动板，从而控制电机。-IP core output by the three-way pwm wave can be used to control a servo drive plate and two L298N to control the motor.
addsub
- Verilog HDL: Adder/Subtractor
butterfly
- FFT模块里的蝶形运算单元，需要用到加法器，减法器，二选一选择器-FFT module of butterflies, need to use an adder, a subtracter, a second election selector
DC_motor
- 为一个直流电机驱动控制程序，包括两个子模块和一个顶层模块，均为verilog源码。-A dc motor drive control code, including two modules and a top-level module, they are all the verilog code.
homework32
- 这是32位移位寄存器，是用verilog编写的，能够实现从1到31位的左或右的移位-This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right