资源列表
ModelSim_Altera_61d_Exercises
- 很好的学习文档，对于软件的理解很有用。好好看，-Good learning document is useful for the understanding of the software. Good to see,
verilog_code
- verilog的大量实例，可以供初学者使用-a large number of instances of verilog
two_d_dct_serial
- Verilog codes for 2D Discrete Cosine Transform (DCT)
uartvhdl
- VHDL语言实现的UART IP核，比较实用-VHDL language to achieve the UART IP core, more practical
mem32_to_pcitarget_verilog
- This design example shows how to implement interface between 32-bit pci target Altera megafunction instantiation and a 32-bit synchronous memory
FPPG_CPLD_VHDL
- Polish documentation of FPGA, CPLD and VERILOG. Many examples and datasheets.
calc
- 用FPGA设计的简易计算器,包括按键模块,数码管模块-Use the FPGA design simple calculator, including key module, digital tube module
fpga_16bit
- Use FPGA to light on LCD module
ddc
- 数字下变频，vhdl代码，包含CIC和HF滤波-vhdl
fft_1024_hdl
- 一个 1024 点 FFT ， 基 4 蝶形运算架构， 5级流水，乒乓内存，有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
dwt2d_latest[1].tar
- 小波变换的开源代码（Verilog HDL）包括有测试文件，本人看过，挺好。-code of dwt
lfsr
- 此实验介绍了伪随机序列的产生原理，并用verilog语言将其编码实现，有详细的代码备注-This experiment introduces the principle of pseudo-random sequence and its encoded with the verilog language implementation, a detailed code Notes