资源列表
mult_piped_8x8
- 8位乘8位的流水线乘法器，采用Verilog hdl编写-8 x 8-bit pipelined multiplier, used to prepare Verilog hdl
8b10b
- 如题,原始8B10B编码，仿真通过。真麻烦，要说那么多废话-as title
m
- vhdl,序列信号发生器，发出11101010，可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
MAX263-MAX268
- D板的数字可编程有源滤波模块设计，MAX26 系列数字编码式滤波器的使用方法-MAX263，MAX264，MAX265，MAX266，MAX267，MAX268
Verilog-pci
- PCI的FPGA实现，使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
Digital_Competition_Responder
- 设计一个数字式竞赛抢答器，可以判断第一抢答者，并具备计分功能。-Competition to design a digital answering device, can determine the first answer in person, and have the scoring function.
rloc
- RLOC 属性在vhdl code中的直接描述。xilinx的范例文件-Example files for the applicantion of RLOC in Xilinx device.
Verilog_ADCtestcode
- ADC测试的verilog代码，可以下载到FPGA上面实现对ADC性能测试。-the test code for ADC of verilog
LMS_filter
- verilog HDL 写的LMS滤波器-LMS filter using verilog HDL language
syn_frame
- 基于verilog的帧同步搜索,fpga中可以实现帧头搜索，进而实现同步，并有一定的容错能力-verilog-based frame synchronization searching
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
hanming
- 用Verilog语言实现汉明编码，很粗燥，是大三的时候做的-With the Verilog language Hamming code, it is rough dry, a junior at the time to do