资源列表
debounce
- 基于VHDL的键盘去抖动电路 基于VHDL的键盘去抖动电路-VHDL-based keyboard to jitter circuit VHDL-based keyboard to jitter circuit
MicroBlaze_Spartan3_Sample
- Microblaze spartan 3E
fredevide
- 用FPGA仿真实现数控分频器，完整的工程文件-FPGA simulation of nc prescalar, including complete project files
encode_8bl0b
- 8b10b的verilog编码程序，已经验证过没有问题，效果比以前的要好-8b10b the verilog coding process has been proven there is no problem, the effect is better than before
DDS
- 我们小组共了一个月做的DDS,程序核心用的是Verilog HDL,有仿真波形,输出正弦波,方波,及三角波,步进可调.频率范围1HZ--10MHZ-Our group for a month to do a total of DDS, the procedure is used in the core of Verilog HDL, there are simulation waveform, the output sine wave, square wave and triangular wa
r80515
- r80515源代码，包含说明文档。FPGA验证通过-r80515 source code, including documentation. Verified by FPGA
rs232
- FPGA 数字滤波算法 资料，自己可以设计等LMS 算法-FPGA Digital Filter Algorithm for information, they can design LMS algorithm
spartan6
- xilinx spartan-6 fpga原理图，包括电源部分，外接ddr2等功能 -xilinx spartan-6 fpga schematics, including power supply, external features such as ddr2
fsl
- freescale 08系列单片机开发及c语言编程简介-freescale 08 Series single-chip development and c language programming brief introduction
edk_for_busy_people
- XILINX 出品 EDK快速学习资料。 EDK在 Xilinx FPGA上构架一个CPU软核， 以提高整个系统的灵活性，和可扩展性。-EDK document by Xilinx. EDK is used to build a soft CPU Core on XILINX FPGA.
VHDL8
- 一个VHDL拨码开关以及数码管显示的例程，让你更好的明白VHDL查表法的方便，从而减少逻辑单元的使用。-A VHDL DIP switches and digital LED display routine, so you better understand the convenience of VHDL look-up table, thereby reducing the use of logic cells.