资源列表
Vhdl1
- 具有异步清零、同位输入/输出的4位计数器的VHDL代码（包含一个实体和一个与之对应的结构体）-With asynchronous clear, with digital input/output 4-bit counter of the VHDL code (including an entity and a corresponding structure)
MIPS32ALU
- VHDL MIPS 32位ALU的设计，基于Quaryus II平台-VHDL MIPS 32 位 ALU design platform based on Quaryus II
DM412_1ea_test
- 点晶DM412单颗级联测试程序，使DM412输出恒流，修改级联数可做点光源控制程序-DM412 single point crystal cascade testing procedures so that the output current DM412, modify the number of cascade control procedures can point light source
LDPC-Verilog
- LDPC的verilog程序，含有编解码的过程-LDPC verilog
CRC10
- CRC校验 自己编写的程序，通过matlab仿真-CRC check
dds
- verilog 硬件语言实现DDS，使用ise11.1和modelsim se6.5仿真测试-verilog hardware language DDS, using the simulation test ise11.1 and modelsim se6.5
FSK
- 频移键控FSK的Verilog实现，带测试文件，并在FPGA开发板上成功验证-Frequency Shift Keying FSK the Verilog implementation, with the test file, and successfully verified in FPGA development board
fsk
- 用Verilog实现FSK调制，调用IP核实现正弦余弦的调制-Verilog implementation using FSK modulation, called IP core to achieve the modulation sine cosine
OV7620_TEST
- FPGA驱动OV7620程序代码，SCCB部分由单片机完成，FPGA负责完成图像处理和TFT液晶的显示。经试验，效果不错！-FPGA-driven OV7620 code, SCCB completed in part by the microcontroller, FPGA responsible for the completion of image processing and TFT LCD display. The test, good results!
jibengongtestbench
- testbench的基本写法，双口ram,双端口的编写 -The basic writing testbench, dual-port ram, dual-port the preparation of
udp
- VHDL implementation of UDP protocol
Design-of-taxi-meter-Based-on-FPGA
- 本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式；并对这两种实现方式的优点和缺点进行分析，比较后确定本系统的方案：基于FPGA的出租车计费系统的设计。-This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approa