资源列表
bpsk
- 基于bpsk的vhdl语言编程与性能仿真-Based on the vhdl language bpsk programming and performance simulation
PWM256
- Verilog 所寫的可程式 PWM 信號產生器. 特點是設定參數時不會產生Glitch現象. 包含二個 .do 檔給 model*sim 幫助編譯及模擬.-A PWM generator writing in Verilog. This module will generate glitch while changing the setting. Including 2 .do files which can help compiling and simulating in the model
Snake
- This an implementation of snake game in VHDL for Spartan 3 board. It is composed of 5 vhdl files. The output of the system is a CRT monitor.
datashow
- 本程序是一个用VHDL编写的数码管扫描显示控制器的设计与实现的程序，仅供学习。-This procedure is a VHDL prepared using digital tube scanning display controller design and implementation of procedures for learning.
QAM
- 16qam调制器的FPGA实现。使用Verilog实现全数字16-QAM调制器。-16qam Modulator FPGA. Use Verilog for full digital 16-QAM modulator.
GPS.RAR
- 本工程包含了一个GPS接收机的基带处理模块，包括信号捕获和跟踪、电文解调等-The project includes a GPS receiver baseband processing modules, including signal acquisition and tracking, message demodulation
SOPC
- SOPC开发快速入门教程，很详细，是QUARTUSII 软件中的-SOPC Development Quick Start Guide, very detailed, is QUARTUSII software
pingpang
- FIFO读写，用使用状态机完成两片FIFO读写，乒乓操作。-FIFO read and write, using the state machine complete with two FIFO read and write, ping-pong operation.
STC12C5A60S2-and-EPROM-
- 基于单片机STC12C5A60S2的内部EPROM测试程序,并将测试结果在LCD1602上显示-EPROM-based microcontroller STC12C5A60S2 internal testing procedures and test results displayed on the LCD1602
8VGA
- 基于FPGA EP1C6Q的八色VGA显示程序。已经通过调试可用。-Based on FPGA EP1C6Q the eight-color VGA display program. Have been available through the debugger.
sine-generator
- 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
LMS-vhdl-coad-
- 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners