资源列表
divideUnit
- a verilog programmed divide unit
multilyUnit1
- a verilog programmed multiply unit algorithm
multiplyUnit2
- verilog multiply algorithm
PIC-Code
- the verilog code used to design a PIC uC
UpDownCounter
- an up down counter in verilog
bingchuan2
- verilogHDL编写的并串转换模块，在ISE软件中仿真过，可综合，绝对是正确的-prepared and verilogHDL string conversion module, the ISE simulation software that can be integrated, is absolutely correct
bingchuan
- verilogHDL编写的并串转换模块，在ISE软件中仿真过，可综合，绝对是正确的-prepared and verilogHDL string conversion module, the ISE simulation software that can be integrated, is absolutely correct
uart
- 基于FPGA的uart源代码，异步串行通信，vhdl书写的。-uart codes。write with vhdl.
Codingexperimentcrcdcord
- 编码实验Your use of Altera Corporation s design tools, logic functions and other software and tools, and its AMPP partner logic -Coding experiment
stamp_seller
- 一个自动售邮票的控制电路。 用两个发光二极管分别模拟售出面值为六角和八角的邮票，购买者可以通过开关选择一种面值的邮票，灯亮时表示邮票售出。用开关分别模拟一角、五角和一元硬币投入。用发光二极管分别代表找回剩余的硬币。 要求：每次只能售出一枚邮票；当所投硬币达到或超过购买者所选面值时，售出一枚邮票，并找回剩余的硬币回到初始状态；当所投硬币值不足面值时，可以通过一个复位键退回所投硬币，回到初始状态。-An automatic control circuit sell stamps. With