资源列表
S6_LCD_VHDL
- LCD的vhdl语言编写的程序，实现lcd的控制-lcd
DFF_BDF
- 利用VHDl语言实现的DDS正弦信号的输出-dds
LCM_OK_new_8b
- 利用FPGA E2C5T144时序驱动LCM160*160模块，已经驱动点亮LCM模块并且可以使用-use FPGA E2C5T144 drive LCM 160*160 ,is useful
clock
- FPGA用lcd显示屏实现的24小时的计时器-FPGA with the lcd screen to achieve a 24-hour timer
LCDfcout
- FPGA实现LCD显示的频率计，芯片为cyclone-FPGA realization of the frequency meter LCD display chip for the cycloneII
EP2C8Q208SDRAM
- NIOS系统设计的SDRAM控制程序-NIOS system design SDRAM control procedures. . .
ITU_656_Decoder
- Aletra DE2开发板 ITU_656_Decoder-ITU_656_Decoder
MTC700_VGA.RAR
- VGA Code for an spartan 3e in vhdl with an ucf file. You will find everything in de zip
PROG
- USED TO CALCULATE DELAY
fir
- vhdl code for fir filter
hhtrunc
- Used to truncate the input signal
RAM.ZIP
- VHDL CODE FOR RAM AND ROM