资源列表
Tutorial_5
- 一个序列检测器的FPGA设计实验，通过LED灯显示，基于Spartan-3e开发板-The sequence detector will look for the input series “10010.” LED’s will show how much of the series has been detected and when the entire series has been entered an additional LED will come on. Circuit input
Tutorial09_Clock
- 基于Spartan-3e的数码管显示时钟程序的设计，整个流程讲解详细。-A very important concept in digital design is that of the clock. A clock is used to synchronize systems in digital logic, and provides a convenient way to keep track of real time. Another equally important fact is
mix
- 本代码是基于Verilog语言，是在伽罗瓦域GF(2^8)上完成加法和乘法运算，主要完成ASE加密的列混合运算-This code is based on the Verilog language, is the Galois field GF (2 ^ 8) on the completion of addition and multiplication, the main column of the completion of ASE encryption hybrid operation
20100728
- 一种很好的读后清零寄存器的设计思路与方法，对FPGA寄存器设计设计具有很好的启发-Reading a good clear design concept and method registers, registers on the FPGA design has good design inspiration
shift_reg
- actel fpga ap030 regshift示例-actel fpga ap030 regshift
VHDLshiyingjiaocheng
- VHDL实用教程，很详细的例子，新手学习必备-VHDL practical course, a very detailed example, novice to learn essential
qipan
- 该程序是在QuartusII环境下用VHDL编写的可以在SOPC平台显示棋盘格功能的代码。很好用，欢迎下载。-The program is under QuartusII prepared using VHDL display board in SOPC platform for cell function code. Useful, are welcome to download.
S3Demo
- 用vhdl编的ps/2口键盘命令到vga口-Series with vhdl ps/2 keyboard command to the vga port 口
Detailed_Analysis_of_Verilog_language
- Verilog语言详细解析Detailed Analysis of Verilog language-Verilog language detailed analysis Detailed Analysis of Verilog language
Verilog_classic_documentation
- Verilog经典文档资料Verilog classic documentation很不错的经典资料-Verilog classic documentation Verilog classic documentation is very good classical information
verilog_classic_example_of_a_collection
- verilog经典实例集合verilog classic example of a collection-a collection of classic examples of verilog verilog classic example of a collection
Verilog_HDL_company_information
- Verilog HDL 公司内部资料Verilog HDL company information-Internal information Verilog HDL Verilog HDL company information