资源列表
Verilog_HDL_Programming_Guide
- Verilog HDL程序设计指南Verilog HDL Programming Guide-Programming Guide Verilog HDL Verilog HDL Programming Guide
pingpong
- verilog描述的乒乓球游戏,在FPGA上已经验证成功-verilog descr iption of the table tennis game, has been successfully verified in FPGA
clk_div3
- 在fpga中对于pll无法完成的分频,可采用计数方式,本例用状态机实现对时钟的奇数分频。-Pll in fpga can not be completed in the sub-frequency counting method can be used, in this case with the state machine to achieve an odd number on the clock frequency.
DDS
- 本代码在fpga中实现了dds,程序有三个按键:一个控制产生的波形(正弦波或方波),另两个控制频率增加或降低。程序附有注释,并在signaltap中仿真成功。-The code is implemented in fpga a dds, program has three buttons: a control generated waveform (sine or square wave), the other two control the frequency increase or decr
ledplay
- 基于VHDL的各种流水灯的显示,程序简洁,占用资源少-VHDL-based light display a variety of water, the program simple and less resource
lcd_move
- 基于VHDL的液晶动态显示,完整的Quartusii编程,初学者入门好帮手,读者打开即可使用-VHDL-based LCD dynamic display, complete Quartusii programming, a good helper for beginners entry, readers can use to open
bianpincs
- 一个变频程序,按键按下后能够逐步变化频率,直至稳定-A frequency conversion process, after the button press can gradually change frequency, until stable
RCServo
- CONTROLLER RCSERVO MOTOR
uart16
- 一个16位的uart,可以实现串行通信,接受或者发送数据!-A 16-bit uart, serial communication can be achieved, accept or send data!
ctc16
- 一个定时器/计数器,里面实现了两个定时计数器,每个都可以写入方式控制器,以实现定时或者计时功能!-A timer/counter, which implements two timer counters, each of which can be written mode controller to achieve the function of time or the time!
cordicalgorithm
- this zip file contains some details which details how to use coredic algorithm to implement trigonometric functions
mamta
- the zip file i have uploaded has some testbenches in vhdl for sqare root,sum,subtract
