资源列表
clock
- 数字计时器的vhdl实现，quartus 和 modelsim 仿真-Digital timer vhdl achieve quartus and modelsim simulation
configuration_selectmap20110310
- 实现两个FPGA与PROM之间的通信，PROM先与第一个FPGA通信，然后通过第一个FPGA与第二个FPGA通信-Communication between the two FPGA and PROM, PROM first and FPGA communication, and then through the the first FPGA second FPGA communication
Extended_Euclid
- Extended Euclidean using Spartan3 FPGA
drusrc
- 通过arm下载fpga程序。已经成功通过测试-Download fpga program through the arm. Has been successfully tested
LCD_NIAN1
- 1602显示汉字“年月日”，对应的时间需要自己改一下-1602 show the Chinese character for " date" , corresponding to the time of need to change
vga
- vga，显示彩条，及其简单易懂，适合初学-vga, display color bars, and its easy-to-understand, suitable for beginners
sdram_tequan2
- sdram与UART联合调试代码,通过UART传送数据至SDRAM，然后再从SDRAM中读出来-sdram and UART
[Andraka]_Modulation__Demodulation_Techniques_of_
- modulation and demodulation techniques of FPGA
dcs_vhdl_coding_rules_es_v4_4
- VHDL coding rules from tampere university
mimasuo
- FPGA电子密码锁，基于VHDL编程语言，可实现报警等功能，方便实用。-FPGA electronic locks, VHDL-based programming language, can be realized the alarm function, convenient and practical.
DWT
- 在altera 9.1下实现对图像数据的小波分解，里面包含有把图片转换成图像数据的软件。-In altera 9.1 to realize the data of image wavelet decomposition, which contains the picture into image data of the software.
Digital-frequency-meter
- 设计了一种基于EDA的数字频率计，它主要采用的是测频法测量通常情况下，计算每秒内待测信号的脉冲个数，即闸门时间为1 s。所得的计数个数即为频率，然后输出给数码管显示。-It introduces a design based on digital frequency meter EDA, it mainly adopts frequency measurement method for measuring the is usually calculated per second, for the