资源列表
clock
- clock example for xilinx spartan 3 starter board-clock example for xilinx spartan 3 starter board....
t65
- Full VHDL code for T60 processor-Full VHDL code for T60 processor....
final3
- FPGA实现计算器（四位以内加减乘除，逻辑运算，包含优先级）-FPGA realization of calculator (four less than addition, subtraction, logical operations, including priority)
IFFT
- 用Verilog语言完成快速傅里叶变换的反变换-the realization of IFFT on Verilog language
jiaozhijiejiaozhi
- VHDL代码完成行列交织与解交织的功能实现-the realization of interleaver on VHDL language
vhdl
- VHDL课件，详细介绍了怎么编写程序，是入门者的好资料。-Good Courseware of VHDL for the beginners
my_lms
- 自适应滤波，对输入信号进行选择性的加权处理，使输出达到最优化，并且能够跟踪和适应系统和环境的动态变化-Least mean square，of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment
simplePCIE_q72
- pci express ...psdfjvp kapk njdpidvj iv
picture_in_picture_demo
- picture in picture information is given in this pdf-picture in picture information is given in this pdf...
verilogiic1121
- i2c的verilog程序，通过写入eeprom再读出并在seg数码显示管上显示来进行验证-i2c' s verilog program eeprom read by writing out and in the seg digital display tube display to verify
verilogvga
- 基于spartan3e的vga程序，测试通过，在屏幕上显示大小矩形-Based on the vga spartan3e procedures, tests passed, the size of the rectangle on the screen
uart
- 基于spartan3e的串口驱动程序，使用verilog编写-Based spartan3e serial driver, written using the verilog