资源列表
sinewave
- Code for sine wave generation
d_flip_175
- 4 D-FlipFlop source code with VHDL
ChkRpm
- Motor RPM checking source code
binary
- binary state machine encoder
CSDmultiplier
- Code for CSD Multiplier
Xilinxtestbenchwriting
- This book is all about test bench writing in verilog and VHDL.
Exp3_Timer
- 用VHDL在SOPC试验箱中实现定时器，用ＶＨＤＬ硬件描述语言实现处理器CPU-Use VHDL to implement the timer in SOPC chamber, with the VHDL hardware descr iption language processor CPU
Exp6_SPI_AD_DA
- 用VHDL在SOPC试验箱中实现DA_AD转换，用ＶＨＤＬ硬件描述语言实现处理器CPU-With VHDL SOPC test box in DA_AD realization, with VHDL language processor CPU hardware descr iption
keyboard
- 用VHDL硬件描述语音实现键盘控制操作，该代码在FPGA中经过了严格的运行调式-With VHDL keyboard control realization of hardware descr iption speech, the code in the FPGA through strict operation mode
encoder_state_v4
- motor phase count with A, B, Z phase
OneDflip74
- 1 Dflipflop source code with VHDL
ODff377
- 8Dflipflop source code on VHDL