资源列表
shumaguan
- FPGA中数码管的使用，verilog程序，已经显示成功-The use of the FPGA digital tube, verilog program, has been shown to successfully
time
- 基于Verilog HDL ＦＰＧＡ开发，时序篇详细教程代码，丰富实例源代码，FPGA学习与参考非常好用-Based on Verilog HDL FPGA development, timing articles detailed tutorial code, abundant source code examples, FPGA is very useful learning and reference
chengfachufa
- ISE13.2的SPARTAN-3E 乘法除法器-ISE13.2 the SPARTAN-3E multiplication Divider
p_s_fpga_to_mcu
- fpga与单片机通信，fpga端，fpga发送，单片机接受，能发多位数据，可以自己设置-Communication with the microcontroller fpga, fpga end, fpga sent microcontroller to accept, to send a number of data, you can set up their own
ads7841_control
- 本程序是fpga控制ads7841采样，fpga中用状态机来写时序，亲测可用-This procedure is fpga control ads7841 sampling, fpga using state machine to write timing, pro-test available
dac7554_wr
- 本程序为fpga控制dac7554输出，用状态机来写时序，亲测可用-The procedures for the fpga control dac7554 output, the state machine to write timing, pro-test available
Modelsim_How_to_use_pdf
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
Modelsim
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
Quartus-guide
- Quartus II的详细使用教程，初学verilog的可以好好看看，相信会有所帮助的-Quartus II detailed tutorial, verilog beginner can take a look, I believe will be helpful
FIR_dida
- 自己写的FIR滤波器设计，verilog语言写的，很好用-Write your own FIR filter design, verilog language, easy to use
fre_test_chenshuo
- fpga的等精度测频程序，很准确，最少可以控制到0.1hz到47M,-fpga and other precision frequency measurement procedures, very accurate, at least can be controlled to 0.1hz to 47M,
SDRAM_verilog@tequan
- 本资源是特权同学编写的sdram控制器，包括数据读写，串口输出，很有学习价值-This resource is privileged students write sdram controller, including data read and write, serial port output, is worth learning