资源列表
Fre_Test
- VHDL语言频率计，需外围自行搭建整形电路。频率测量在1HZ-10MHZ精度为0.1 左右-VHDL frequency meter, a peripheral self build shaping circuit. The frequency measurement accuracy in 1HZ-10MHZ is about 0.1
KEY
- 利用VHDL实现4X4键盘的扫描和译码，并且在数码管显示相应的按键值。-Use VHDL to achieve 4X4 keypad scanning and decoding, and displays the corresponding value in the digital keys.
regfiles
- 寄存器堆 32个寄存器，可实现数据写入和读出，regfiles 时钟控制-Register file 32 registers allow data writing and reading, regfiles clock control
verilong-example
- vhdl语言例程学习，，初学者适用的书籍-vhdl language routines suitable for beginners to learn the books
huffman.vhdl
- Hoffman Tree VHDL Code. All credit goes to the other guy who uploaded this to this website.
FPGAs_For_Dummies_eBook.pdf
- Altera 家官方出品的FPGA入门资料-Altera FPGA family produced official introductory information
RS_enc
- RS编码器设计，使用Verilog实现。-RS encoder design, Verilog implementation.
led_rotary
- Spartan-3E实验板基于Verilog实现旋转按钮控制八个LED灯移动方向-Spartan-3E board is based on the experimental realization Verilog eight LED lights spin button control the direction of movement
Traffic-Controller
- 本代码为基于Spartan6的verilog交通控制灯代码，在ISE软件中仿真成功。-The code for the verilog code Spartan6 traffic control lights on in the ISE software emulation success.
Adder
- 本代码为用三种方法实现verilog加法器代码，在ISE中基于Spartan6仿真成功。-This code is used three methods to achieve adder verilog code, based on the success in the ISE Spartan6 simulation.
labmic_soc
- SoC and FPGA desgin
mips
- 基于MIPS架构实现的单周期处理器，包含多种基本操作，验证方法是把自己的学号写进连续内存。-MIPS-based architecture for single-cycle processor, includes a variety of basic operations, authentication method is to learn their numbers written contiguous memory.