资源列表
VerilogHDL
- 王金明：《Verilog HDL 程序设计教程》程序-Wang Jinming:
EDA
- 数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL
i2c
- 基于EPM1270的EProm at24c02 驱动-Based on the EPM1270
vga
- 基于EPM1270的VGA显示器接口源码Verilog-Based on the EPM1270
even_division
- 任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
MinWinsockSpi
- verilog ADPLL file with testbench
SPI_FireWall
- verilog spi file with testbench
VCchuankou
- verilog ADPLL file with testbench
top_2
- 基于CPLD的签到器的设计，用三维数组队人名进行储存-Based on the attendance CPLD design, a few team names with three-dimensional storage
checkNodee_Behavioral_VHDL
- LDPC码校验节点（checknode）进行奇偶校验方程时的vhdl编程，硬件语言实现-LDPC check nodes (checknode) carried out at the time of parity equation VHDL programming, hardware language
bitNode_Behaviora_VHDL
- LDPC码的消息节点（Bitnode）消息更新过程的VHDL语言实现-LDPC code of the message node (Bitnode) news update process of the VHDL language
adder
- cpld/fpga常用加法器设计的verilog程序-cpld/fpga common adder Verilog design procedures