资源列表
jiaotong
- 已经测试完美的交通灯控制器...状态机实现的，对于初学者应该有用的-The traffic light controller has perfect testing,State machine implementation.It should be useful for beginners.
FPGA_Edge-Decetion
- 基于FPGA的图像边缘检测器的研究与设计，采用EDA技术。-Research and Design of FPGA-based image edge detector, using EDA technology.
FPGA_VGA
- 采用FPGA技术，使用少量资源，实现VGA各个控制信号。-Using FPGA technology, the use of a small amount of resources to achieve VGA various control signals.
SOC_FPGA
- 在图像压缩SOC系统中采用FPGA技术，实现数据传输和处理。- In image compression using FPGA technology SOC systems, data transmission and processing.
mul_barrel
- vedic multiplier. it is a 8x8 multiplier.
bsm
- it is the verilog code for a Base Selection Module
pid
- It is a verilog code for a vedic multiplier using a barrel shifter
prefix-adders
- it is a document for parallel prefix adders
SIG_CLK
- 四分频，四个相位的时钟输出，FPGA，vhdl，xilinx-Divided by four, four-phase clock output, FPGA, vhdl, xilinx
ps2_scan
- 把PS/2键盘发射的扫描码通码转换成ASCII码-ps_scan, transfer ps keyboard information to ASCII
Reg-vs-Wire
- This book explains about difference between REG and WIRE in Verilog.
LCD_test
- (1)verilog Hdl语言学习。（2）1602LCD的verilog程序。-(1) verilog Hdl language learning. (2) 1602LCD the verilog program.