资源列表
FPGA_soft_jieshao
- 介绍FPGA的设计quartue 2设计软件。其中还有INDESIGN 和XILINUX 公司的软件 -Introduced the design of FPGA design software quartue 2. Among them were XILINUX InDesign and software
McGraw.Hill.VHDL.Programming.by.Example.4th.Ed_188
- 一个非常好的VHDL语言书籍,内容全面且非常详细-A very good VHDL language books, the contents of a comprehensive and very detailed
Verilog130
- Verilog设计130,非常有用 对初学者尤其有帮助-Verilog design 130, is very useful especially helpful for beginners
FIFO1
- FIFO存储电路的设计与实现,用verilog实现fifo的参考设计-FIFO memory circuit design and realization of the realization of fifo with Verilog reference design
vhdlkey
- vhdl 关于键盘扫描的程序 。。。。 很有用的 。。。。。。也很好-VHDL on the keyboard scanning process. . . . Very useful. . . . . . Good
MyProject
- 3-8译码器的仿真实验。本实验选用的仿真开发软件是MAX+plus II Version 9.3,原理图源文件保存在MyProject目录中,为138decoder.gdf,另有我写的实验报告,呵呵,适合仿真入门-3-8 decoder simulation. Selected in this experiment simulation software is MAX+ Plus II Version 9.3, schematic source files stored in the MyPro
FPGAdesignrule
- 一个很好的讲稿,希望大家多提意见,呵呵。-A very good scr ipt, hope that we do so, huh, huh.
an501_design_example
- PWM文件 用于CPLD,学习如何用VHDL语言写程序-PWM files for CPLD, learn how to write VHDL language program
cymometer
- 采用VerilogHDL语言编写的数字频率计-VerilogHDL languages using digital frequency meter
FIR_VHDL
- FIR滤波器的VHDL代码,可以修改冲击函数的值-FIR filter VHDL code can modify the impact of the value function
LOCK
- 基 于FPGA的电子密码所 设计,有详细的设计思路以及部分代码-FPGA-based electronic password by design, detailed design and some code
VHDLjiaotongdeng
- 有关毕业设计交通灯的VHDL设计,包括源码程序和仿真图形相关报告。-Traffic lights on the graduation project of VHDL design, including source code and simulation procedures related to the report graphics.
