资源列表
8116
- LCMV optimization design array signal processing, Very suitable for the study using computer vision, Using high-order cumulants of MPSK signal modulation recognition.
hdl-2014_r2.tar
- AD9361 IP 核，Linux版本，Vivado2014.2(AD9361 IP core, used on Linux, Vivado2014.2.)
hdl-2014_r2
- AD9361 IP核，Windows版本，Vivado2014.2(AD9361 IP core, used on Windows, Vivado2014.2)
hdl-2015_r2.tar
- AD9361 IP核，Linux版本，Vivado2015.2(AD9361 IP core, used on Linux, Vivado2015.2)
hdl-2015_r2
- AD9361 IP核，Windows版本，Vivado2015.2(AD9361 IP core, used on Windows, Vivado2015.2)
hdl-2016_r2.tar
- AD9361 IP核，Linux版本，Vivado2016.2(AD9361 IP core, used on Linux, Vivado2015.2)
hdl-2016_r2
- AD9361 IP核，Windows版本，Vivado2016.2(AD9361 IP core, used on Windows, Vivado2016.2)
Elevador
- Elevator - VHDL Project
sdram_ov7670_rgb_vga_640480
- IIC配置ov7670，图像存储到sdram，并通过vga显示(IIC configuration ov7670, images stored to SDRAM, and displayed through the VGA)
verilog读取bmp图像数据的程序段.txt
- verilog 写的程序段，实现的功能是把bmp图像直接读到数组中。主要是用在仿真过程中，读取图像数据产生video激励用。 代码是个代码片段，只是读取bmp图像部分。 有分的觉得有用的话赏个分，没分的捧个场啦。(read bmp data to array ,used in video stream gen when sim)
có t?ng chi?u dài to?n b? cay v?i
- invalid descr iption, it should be english
2-bit-full-adder-master
- full adder 4 bit one you