资源列表
8_LigWater
- FPGA,VHDL语言 :分频1S 8位流水灯,适用于所有FPGA芯片,VHDL源程序-FPGA, VHDL language: divide-1S 8 light water, and apply to all FPGA chip, VHDL source code! !
DM9000A
- 关于DM9000A开发,使用NIosII软件,alteraFPGA进行设计的实例-About DM9000A development, use NIosII software, alteraFPGA examples of design
project
- 在Spartan-3E FPGA开发板上做的一个小项目--带语音功能的计算器,并且通过VGA接口在显示器上显示图形界面。涉及到ps2键盘模块,VGA显示模块,picoblaze汇编,串口收发模块。-In the Spartan-3E FPGA development board to do a small project- a calculator with voice capabilities, and VGA interface, through the graphical interfac
S6_LCD_VHDL
- FPGA实验工程源代码,梁祝音乐,跑马灯-FPGA source code of some experiment
5
- VHDL常用模板之与门、或门。。超实用!vhdl编程必备-VHDL templates of commonly used with the door, or door
UART
- 用UART实现RS422通信-UART TO RS422
COUNT
- 这是一个十六进制的加减计数器源代码,把其修改一下就可以用其他进制了-This is a hexadecimal addition and subtraction counter source code, its change it can use other hex of the
verilog
- 用verilog实现的串并转化,别人写的,感觉不错,与大家共享一下。-serial
shifter32
- 32位桶形移位器,verilog语言书写-barrel shifter
move
- 桶形移位器,运用Verilog语言,编程实现,仿真正确,顺利执行。-Barrel shifter, the use of Verilog language, programming, simulation is correct, the successful implementation.
PS_2
- 此模块用于"PS/2接口的鼠标或键盘"与"具有外部读写的8位并口单片机"双向通信模块. Verilog HDL语言编写,在Quartus II 8.1 (32-Bit)软件中编译,并下载至EPM7128SLC84-10芯片中通过. 文件中有详细的注解. 此模块具有对于PS/2时钟和数据线的滤波功能,这样减少外部干扰,保证通信的可靠性! -This module for the "PS/2 mouse or keyboard interface" and "read
TLC549
- tlc549驱动程序,应用于cyclone 1c12,电子设计大赛使用过的-TLC549 driver, used in the cyclone 1c12 used by the Electronic Design Contest
