资源列表
LMX2531_PLL_module
- 利用FPGA完成对锁相芯片LMX2531初始化，语言为VHDL.-this module solute the PLL chip LMX2531 event ,using FPGA with VHDL.
VHDL_code
- 基于FPGA的AD,DA,LCD,LED,CAN,I2C,PS2,VGA以及一些通讯ASK,FSK等的VHDL源程序，所有程序已通过调试，需要的拿走。-FPGA-based AD, DA, LCD, LED, CAN, I2C, PS2, VGA, and some communications ASK, FSK, etc. VHDL source code, all procedures have been debugging, need to take.
88fifovhdl
- 88位进出缓冲器8*8位的fifo数据缓冲器的vhdl源程序 编了个8*8位的fifo数据缓冲器的vhdl源程序，是经过quartusII4.2编译成功的程序。。希望能跟各位交流-88 out of 8* 8-bit buffer fifo data buffer vhdl source Bianle Ge 8* 8-bit data buffer fifo vhdl source code is compiled through quartusII4.2 successful progra
NIOSII-uartprogram
- SOPC技术 NIOS II 串口使用详细资料-SOPC technology use NIOS II serial Details
mac控制器
- mac控制器ip核，语言verilog,开发环境xilinx ise,quartus ii等
Booth_mul4_v
- 四位BOOTH乘法器 Booth算法(布斯算法),一个比较推荐的带符号乘法算法-Booth_mul4
12864VHDL
- 采用VHDL语言编写的程序让FPGA驱动12864显示作图和划线。-Using a program written in VHDL to FPGA mapping and marking display driver 12864.
1302write-and-read
- DS1302写读连用程序，可以设置要写的地址,Verilog语言，在板子上跑过的,可以实现功能的-DS1302 write read Ed program can be set to write the address of the Verilog language, in the board runs, can realize the function
61580PCHZ
- 芯片61580的中文文档，对芯片的原理进行了详细的阐述-Chip 61580 of the Chinese documents, the principle of the chip described in detail
up_test
- 基于vhdl语言的源代码，用于检测信号的上升沿，多用于同步时钟-Vhdl source code based on the language used to detect the rising edge, used for synchronous clock
Crack_Altera_Quartus61.0-9.1
- Crack_Altera_Quartus61.0-9.1.rar license-Crack_Altera_Quartus61.0-9.1.rar license!!!
Verilog
- FPGA经典例子，可以让大家更好的学习Verilog HDL-Classic example of FPGA, allowing you to better learn Verilog HDL