资源列表
eda-class-v1.0
- 计算器功能，可加减乘除，可移位,65525以内运算-, calculator functions, addition, subtraction, multiplication, and division can shift, operation within 65525
2007_Xilinx
- 2007年Xilinx 联合实验室主任会议 FPGA设计时序收敛-2007 meeting of directors of Xilinx FPGA Design Joint Lab timing closure
DSP
- 从算法设计到硬线逻辑的实现：复杂数字逻辑系统的Verilog HDL设计技术和方法，结合DSP算法介绍verilog HdL 设计。-From algorithm design to achieve hard-wired logic: complex digital logic system Verilog HDL design techniques and methods, combined with DSP algorithm design verilog HdL introduced.
ram_fifo
- Altera RAM FIFOIP核，实现对FIFO的读写，对满信号和空信号进行判断.-altera ram fifo ip core
Lab1
- FPGA LED. CONNECT TO BOARD SAVE AND IMPLEMENT CODE LEDS WILL LIGHT UP AND BLINK AT A CONSTANT RATE
DE2_video_pass_demo-rww
- 视频发射源发射信号，基于DE2115fpga平台的视频信号显示与处理-Transmitting the video signal transmission source, based on a video signal display DE2115fpga platform and processing
基于FPGA的高速并转串程序
- 该程序用Verilog语言实现了12.5MHz八位并行转为150MHz串行数据.
picoblaze
- xilinx picoblaze八位嵌入式控制器的一点资料-xilinx picoblaze 8 bit embedded controller for information
1553B总线接口技术研究及FPGA实现
- 基于FPGA的1553b接口设计详细设计论文(1553B design based on FPGA)
dsp_test
- 利用FPGA实现DSP浮点运算，VHDL代码-FPGA implementation using floating-point DSP, VHDL code
test-pwm
- FPGA 生成PMW波及其测试程序 使用modelsim se版本10.0测试可用-The FPGA generates the PMW wave and its test program
br_NiosII_SC
- niosII使用介绍，对研究NIOS的人员很有帮助-niosII the use of introduction, the study of NIOS staff very helpful