资源列表
project2_verilog
- 简化LAPS协议实现,verilog的大作业。-Simplify the LAPS protocol, verilog great job.
horse_light4
- 六种花样的流水灯，从左至右，从右至左，中间向两边，两边向中间，跳格闪烁等。verilog语言编写； 并且扩展容易； 有两个状态机构成实现。quartus 9.0和7.1仿真通过。无错误，无警告。-Six kinds of patterns of flowing water lights, from left to right, from right to left, in the middle to both sides, both sides toward the middle, ju
Wolfson-WM8731-audio-CODEC
- audio codec data sheet
ASK2CB-FPGA
- ASK2CB FPGA schematic board
FPGA-quartus-tutorial
- vhdl教程，内部资料，结合具体的FPGA芯片CLCLONE 2 EP2C20Q240C8-vhdl tutorial, internal data, combined with the specific FPGA chip CLCLONE 2 EP2C20Q240C8
EDA
- ADC0809采样控制电路的实现以及在EDA实验箱上的具体要求操作-ADC0809 sampling control circuit and EDA to achieve the specific requirements of experimental operations on the box
DE2_SD_Card_Audio
- 基于SD卡音乐播发器设计代码,SOPC技术,功能齐全的,编译成功的代码-Based on the SD card music broadcast design code, SOPC technology, full-featured, compile the code successfully
config_ad6636
- 用Verilog正确配置ad6636，，在ISE环境中正确编译与实现-Properly configured with the Verilog ad6636,, compiled in the ISE environment and realization of the right
moore state_machine
- 这是一个moore状态机的典型程序，供初学者参考-This is a typical state machine moore procedure reference for beginners
moore1
- moore 状态机的一个简单的事例，初学者很好的地实例！-moore state machine of a simple example for beginners to very good example!
graycnt_3
- 3位格雷码计数器的verilog描述及仿真波形-3 Gray code counter verilog descr iption and simulation waveforms
ad_in
- 用于FPGA,数据宽度转换。10位数据输入，经转换后128位输出模块。-For the FPGA, the data width conversion. 10-bit data input, the converted output module 128.