资源列表
farrow
- 通信中常用的Farrow滤波器的Verilog实现-Communications of the Farrow filter used in the realization of the Verilog
turbocodes_latest.tar
- turbo encode and decoder
Verilog
- 硬件编程经典书籍，FPGA开发者必看的硬件编程语言。-Hardware programming classic books, FPGA hardware developers must-see programming language.
bridge
- FPGA和A/D转换芯片ad7862的IP，可实现4路数据的采样和读取。 用verilog实现的-FPGA and the A/D conversion chip ad7862' s IP, can achieve 4-way data sampling and reading. Achieved with verilog
altpll0
- 锁相环的使用 可以倍频或者分频 可以最多四个输出-Your use of Altera Corporation s design tools, logic functions --and other software and tools, and its AMPP partner logic --functions, and any output files from any of the foregoing --(including device programmin
DOC-JTag-cable-drawing
- XILNX 的 JTAG 燒錄線內部電路圖. 已經驗証過可行, 配合 XILNX ISE 可直接對 FPGA 編程.-It s the circuit diagram of the XILNX JTAG programming cable. It was approved OK. Can drectly programming the FPGA via ISE platform.
UART
- 这是VHDL编写的UART源码，测试成功，欢饮下载-It is written in UART VHDL source code, the test is successful, Huanyin download
recuart_50m
- 本代码功能为实现接收PC发送的串口数据功能 程序通过quartusII 8.1编译，使用verilog语言编写。 可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。 （开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm） 有需要的朋友可以下载参考-The code functions to achieve the receivi
FPGAVHDLd
- 多功能波形发生器VHDL程序与仿真 URAT VHDL程序与仿真 ASK调制与解调VHDL程序及仿真 LCD控制VHDL程序与仿真-Multi-function waveform generator and simulation of VHDL procedures URAT VHDL simulation procedures and ASK modulation and demodulation procedures and VHDL simulation program LC
datapath_fifo
- datapath_fifo used in DMA contect PCI in the DAB system the format of this file is VHDL
fpga_displayer
- 用FPGA实现的LCD现实代码，TFT lcd Controller难得资料，下载不下载由你？-FPGA Implementation of LCD with real code, TFT lcd Controller valuable information, downloads do not download to you?