- Charting_src Report Control is used for the features of List Ctrl
- MATLABjiyudiandetuxiangpeizhun 应用基于点的方法
- asix ASIX AX8817X based USB 2.0 Ethernet Devices driver for Linux.
- DS3 接口测试文档
- tps65911-comparator tps65910.c TI TPS6591x for Linux v2.13.6.
- allocator_test Lets try to allocate almost 4096 Go (on most of the platforms) of memory:.
资源列表
kn_cnt16.v
- 可逆的异步计数器-Reversible asynchronous counter! ! ! ! ! ! ! ! ! ! ! ! !
ad7266
- 实现FPGA对AD7266的控制，采用Verilog语言编写-FPGA to achieve AD7266 control, using Verilog language
ps2
- 用verilog编写的PS/2通讯协议是一种双向同步串行通讯协议。-Verilog prepared with PS/2 protocol is a bidirectional synchronous serial communication protocol.
receive_uart
- fpga串口通信，接收模块程序.verilog语言编写-fpga serial communication, receiving module program
MATLAB-and-FPGA
- 以Xilinx公司的FPGA为开发平台，采用MATLAB及VHDL语言为开发工具，详细阐述数字通信同步技术的FPGA实现原理、结构、方法以及仿真测试过程-In Xilinx s FPGA development platform, using MATLAB and VHDL language development tools, elaborated synchronous digital communications technology FPGA implementation princip
project_11_first_d1_HDMI
- 本代码将TW2867第一通道输出解复用以后进行BT.656格式的解析，然后将奇偶场合并为一帧存入DDR2，读取的时候使用双线性插值算法，将原始的720 x576的分辨率放大到800x600，然后在HDMI口输出。-This code will TW2867 first channel output demultiplexing after parsing BT.656 format, then the parity occasions and as a frame stored in DDR2,
project_6
- YCbCr 颜色空间按照采样率的不同可分为YCbCr444 和YCbCr422、YCbCr420 等， YCbCr422 在视频处理中较为常用，与YCbCr444 相比节约1/3 带宽和存储空间。代码功能是实现YCbCr444 转YCbCr4-YCbCr color space in accordance with the sampling rate can be divided into YCbCr444 and YCbCr422, YCbCr420 etc., YCbCr422 more
project_4
- RGB 与YCbCr 颜色空间可以相互转化，此代码为YCbCr转RGB的实验代码-Display a signal, the resolution information can be seen as 1280 x 720 @ 60P, the display shows the standard 8-color vertical color bar
project_1
- 显示器显示有信号，能够看到分辨率信息为1280 x 720 @ 60P，显示器显示标准8 色垂直彩条-Display a signal, the resolution information can be seen as 1280 x 720 @ 60P, the display shows the standard 8-color vertical color bar
jtdverilog
- 交通灯，verilog，VHDL，modelsim-Traffic lights, verilog, VHDL, modelsim ,,,,,,,,,,
PPRAM-test
- 乒乓缓存，用vhdl编写，用fpga内部ram-Ping-pong buffer, using vhdl to write,
ADVHDL
- 用fpga控制ad采集，用vhdl编写，可控制采样率-With fpga control ad acquisition, with vhdl written to control the sampling rate