资源列表
fifo
- 异步fifo，用Verilog编写，包含testbench，已经通过modelsim调试，内含文档和波形图-Asynchronous fifo, to prepare to use Verilog, including testbench, debug modelsim has passed, including documents and wave
用VHDL生成伪随机数
- 用VHDL生成伪随机数，资源占用少，最高频率可达200MHz
gcd
- 欧几里得算法求最大公约数电路的Verilog实现，消耗功率较低-Euclid algorithm for the realization of the common denominator Verilog circuit, lower power consumption
cpld
- 西安工业大学电信学院信息与通信系综合设计报告 -Xi an University of Technology Institute of Information and Communications Department of Telecommunications comprehensive design report
MIPS
- 组成原理大作业--基于MIPS的运算器设计，内附详细设计文档，包含设计文档和使用手册，主程序，测试程序，还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条，用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and u
SimpleSpi
- SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail.
fpga_USB2
- 基于FPGA的USB2.0的实现方法，适用于急需开发usb2.0的人员-FPGA-based on the realization of USB2.0 method, applied to the urgent need to develop personnel USB2.0
RS_5_3_GF256
- 用于NAND FLASH CONTROLLER 中的 ecc 各个模块VHDL代码-NAND FLASH CONTROLLER for ecc modules in VHDL code
DE4_230_LTM_TEST
- altera DE4——230 + terasic 触摸屏例程-altera DE4- 230+ terasic touch screen routine
DE2_LTM_Ephoto
- altera DE2+ TERASIC 触摸屏照片展示例程-altera DE4+ TERASIC photo touch-screen display routine
FFT
- fft implementation in fpga using vhdl xilinx
2
- 序列检测器VHDL语言设计和仿真和校验模块的程序和仿真结果 -Sequence detector design and simulation of VHDL language and the validation process modules and simulation results