资源列表
tmds_decoder
- Tryout HDMI decoder for Xilinx-based boards, using SERDES logic. Different implementations.
USRP-PID-Controller-clean
- PID feedback controller project for USRP1 boards (FPGA with a convenient analog front manufactured by ettus research). Implements a bitstream as well as python-based user interface.
wu4g
- Wake up network layer for a Hardware based radio project, written in VHDL.
debouncer_vhdl
- RTL and testbench implementations for a switch debouncer with support for multiple switches, written in VHDL.
scope-firmware
- Open-source Spartan-6 compatible project that implements a USB digital scope firmware by alown, including tests.
ddr2_controller
- A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.
led1
- 基于FPGA（Verilog HDL）LED灯实验-Leds flashing.
pcreg
- pc寄存器，上升沿为寄存器赋值，随时读出寄存器内部的值。-pc register, rising to register assignments, ready to read the internal register values.
ext
- 32位数据扩展，可以将16位的数据扩展为32位，分为算数扩展和逻辑扩展。-32 data extensions that can be extended to 16-bit data 32, into extended arithmetic and logical extension.
mux
- 二选一数据选择器，可以实现在两个数据中选择一个数据的功能。-Choose one data selector can a data in two data functions.
decoder
- 三八译码器，可以通过三位输入实现八位的输出，可连接FPGA下板。-Thirty-eight decoder output can be achieved through three eight inputs can be connected to the lower plate FPGA.
barrelshifter32
- 32位桶形移位器，可以实现算数右移、逻辑右移、算术左移和逻辑左移。-32-bit barrel shifter, can achieve an arithmetic right shift, logical shift right, left arithmetic and logical left.